swd-probe
¶
CLI reference¶
glasgow run swd-probe¶
At the moment, this applet does not include any high-level functionality. It only offers very low-level access to the target via the REPL or script interface.
Use the probe-rs applet to debug and program Arm microcontrollers.
usage: glasgow run swd-probe [-h] [-V SPEC] [--swclk PIN] [--swdio PIN]
[-f FREQ]
OPERATION ...
- -h, --help¶
show this help message and exit
- -V <spec>, --voltage <spec>¶
configure I/O port voltage to SPEC (e.g.: ‘3.3’, ‘A=5.0,B=3.3’, ‘A=SA’)
- --swclk <pin>¶
bind the applet I/O line ‘swclk’ to PIN (default: ‘A0’, required)
- --swdio <pin>¶
bind the applet I/O line ‘swdio’ to PIN (default: ‘A1’, required)
- -f <freq>, --frequency <freq>¶
set SWCLK frequency to FREQ kHz (default: 1000)
glasgow run swd-probe dump-memory¶
usage: glasgow run swd-probe dump-memory [-h] [-f FILENAME] [--ap INDEX]
ADDRESS LENGTH
- address¶
start at ADDRESS
- length¶
dump LENGTH bytes
- -h, --help¶
show this help message and exit
- -f <filename>, --file <filename>¶
dump contents to FILENAME
- --ap <index>¶
access memory via MEM-AP #INDEX
API reference¶
- exception glasgow.applet.interface.swd_probe.SWDProbeException(message, *, kind: Kind = Kind.Other)¶
- class glasgow.applet.interface.swd_probe.SWDProbeInterface(logger: Logger, assembly: AbstractAssembly, *, swclk: GlasgowPin, swdio: GlasgowPin)¶
- property clock: ClockDivisor¶
SWCLK clock divisor.
- async line_reset()¶
Perform a line reset sequence.
- async jtag_to_swd_v1()¶
Perform a DPv1 JTAG-to-SWD switch sequence.
- async jtag_to_swd_v2()¶
Perform a DPv2 JTAG-to-SWD switch sequence.
This sequence consists of a JTAG-to-dormant, Selection Alert, and dormant-to-SWD sub-sequences.
- async dp_read(reg: int) int ¶
Read from DP register
reg
, switching the DP bank if necessary.- Raises:
SWDProbeException – On communication error.
- async dp_write(reg: int, data: int)¶
Write
data
to DP registerreg
, switching the DP bank if necessary.- Raises:
SWDProbeException – On communication error.
- async ap_read(ap: int, reg: int) int ¶
Read from AP
ap
registerreg
, switching the AP and AP bank if necessary.- Raises:
SWDProbeException – On communication error.
- async ap_read_block(ap: int, reg: int, count: int) list[int] ¶
Read from AP
ap
registerreg
count
times, switching the AP and AP bank if necessary.The AP reads are pipelined, making this method significantly faster than calling
ap_read()
count
times.- Raises:
SWDProbeException – On communication error.
- async ap_write(ap: int, reg: int, data: int)¶
Write
data
to APap
registerreg
, switching the AP and AP bank if necessary.- Raises:
SWDProbeException – On communication error.
- async initialize() DP_DPIDR ¶
Initialize the SW-DP or SWJ-DP.
The initialization process is:
Perform a DPv2 JTAG-to-SWD switch sequence, as in
jtag_to_swd_v2()
.Perform a DPv1 JTAG-to-SWD switch sequence, as in
jtag_to_swd_v1()
.Perform a line reset and read
DPIDR
to start SWD communication.Write
DP_ABORT
to clear all errors.Write
CTRL_STAT
to request debug power-up.Read
CTRL_STAT
to ensure acknowledge of debug power-up.
- Raises:
SWDProbeException – On communication error, or if debug power-up request isn’t acknowledged.
- async iter_aps() AsyncIterator[tuple[int, AP_IDR]] ¶
Iterate available APs.
Yields 2-tuples
(ap, ap_idr)
whereap
is the AP index andap_idr
is the value of theIDR
register.- Raises:
SWDProbeException – On communication error.