spi-analyzer

glasgow run spi-analyzer

Capture transactions on the SPI bus.

SPI data is captured in a clock domain driven by the SCK pin and reset by the CS# pin. This approach enables capturing data at very high SCK frequencies (up to 100 MHz), but requires a small delay between the last SCK rising edge and CS# rising edge, otherwise the last byte of a transaction will not be captured correctly. Typically, SPI controllers do provide this delay.

Signal integrity is exceptionally important for this applet. When using flywires, twist every signal wire (at the very least, CS# and SCK wires) with a ground wire connected to ground at both ends, otherwise the captured data will likely be nonsense.

The capture file format is Comma Separated Values, in one of the following line formats:

• <COPI>,<CIPO>, where <COPI> and <CIPO> are hexadecimal byte sequences with each eight bits corresponding to samples of COPI and CIPO, respectively (from MSB to LSB); this format is used if one CS# pin is provided.

• <CS>,<COPI>,<CIPO>, where <CS> is a 0-based CS# pin index and <COPI> and <CIPO> are the same as above; this format is used if multiple CS# pins are provided.

If your DUT is a 25-series SPI Flash memory, use the tool memory-25x to extract data from capture files. If quad-IO commands are in use, use the qspi-analyzer applet to capture data.

usage: glasgow run spi-analyzer [-h] [-V SPEC] [--cs PINS] [--sck PIN]
                                [--copi PIN] [--cipo PIN]
                                [--buffer-size BYTES]
                                [FILE]

file

save communications to FILE as pairs of hex sequences

-h, --help

show this help message and exit

-V <spec>, --voltage <spec>

configure I/O port voltage to SPEC (e.g.: ‘3.3’, ‘A=5.0,B=3.3’, ‘A=SA’)

--cs <pins>

bind the applet I/O lines ‘cs’ to PINS (default: A0)

--sck <pin>

bind the applet I/O line ‘sck’ to PIN (default: A1)

--copi <pin>

bind the applet I/O line ‘copi’ to PIN (default: A2)

--cipo <pin>

bind the applet I/O line ‘cipo’ to PIN (default: A3)

--buffer-size <bytes>

set FPGA trace buffer size to BYTES (must be power of 2, default: 16384)